Datasheet

Section 9 Timers
Rev. 6.00 Aug 04, 2006 page 326 of 680
REJ09B0145-0600
2. Event Counter H (ECH)
ECH7 ECH2 ECH1 ECH0ECH6 ECH5 ECH4 ECH3
76543210
0
0000000
R
RRR
RRR
R
Bit
Initial Value
Read/Write
ECH is an 8-bit read-only up-counter that operates either as an independent 8-bit event counter or
as the upper 8-bit up-counter of a 16-bit event counter configured in combination with ECL.
Either the external asynchronous event AEVH pin or the overflow signal from lower 8-bit counter
ECL can be selected as the input clock source by bit CH2. ECH can be cleared to H'00 by
software, and is also initialized to H'00 upon reset.
3. Event Counter L (ECL)
ECL is an 8-bit read-only up-counter that operates either as an independent 8-bit event counter or
as the lower 8-bit up-counter of a 16-bit event counter configured in combination with ECH. The
event clock from the external asynchronous event AEVL pin is used as the input clock source.
ECL can be cleared to H'00 by software, and is also initialized to H'00 upon reset.
ECL7 ECL2 ECL1 ECL0ECL6 ECL5 ECL4 ECL3
76543210
0
0000000
R
RRR
RRR
R
Bit
Initial Value
Read/Write
4. Clock Stop Register 2 (CKSTPR2)
— WDCKSTP PWCKSTP LDCKSTP———AECKSTP
76543210
1
1111111
—
R/W R/W R/W
———
R/W
Bit
Initial value
Read/Write
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the asynchronous event counter is described here. For details of
the other bits, see the sections on the relevant modules.