Datasheet

Section 10 Serial Communication Interface
Rev. 6.00 Aug 04, 2006 page 336 of 680
REJ09B0145-0600
Bit 3: Clock source select 3 (CKS3)
Bit 3 selects the clock source to be supplied and sets the SCK
1
pin to input or output mode.
Bit 3
CKS3 Description
0 Clock source is prescaler S, SCK
1
is output pin (initial value)
1 Clock source is external clock, SCK
1
is input pin
Bits 2 to 0: Clock select 2 to 0 (CKS2 to CKS0)
When CKS3 is cleared to 0, bits 2 to 0 selects the prescaler division ratio and the serial clock
cycle.
Bit 2 Bit 1 Bit 0
Serial Clock Cycle
CKS2 CKS1 CKS0 Prescaler Division Ratio φ
φφ
φ = 2.5 MHz
000φ/1024 (initial value) 409.6 µs
001φ/256 102.4 µs
010φ/64 25.6 µs
011φ/32 12.8 µs
100φ/16 6.4 µs
101φ/8 3.2 µs
110φ/4 1.6 µs
111φ
W
/4 122 µs
2. Serial Control Status Register 1 (SCSR1)
Bit
Initial value
Read/Write
7
—
1
—
6
SOL
0
R/W
5
ORER
0
R/(W)*
4
—
1
—
3
—
1
—
0
STF
0
R/W
2
—
1
—
1
MTRF
0
R
Note: * Only a write of 0 for flag clearing is possible.
SCSR1 is an 8-bit register that indicates the operational and error status of SCI1.
Upon reset, SCSR1 is initialized to H'9C.