Datasheet

Section 10 Serial Communication Interface
Rev. 6.00 Aug 04, 2006 page 343 of 680
REJ09B0145-0600
10.2.4 Operation in SSB Mode
SSB communication uses two lines, SCL (Serial Clock) and SDA (Serial Data), and enables a
number of ICs to be controlled when connected as shown in figure 10.3.
In SSB mode, a tail mark is attached and transmitted following an 8-bit or 16-bit data transfer.
Either HOLD TAIL or LATCH TAIL can be selected as the tail mark.
SCL
SDA
IC-A
H8/3847R
Group chip
SCL
SDA
IC-B
SCL
SDA
SCL
SDA
IC-C
SCK
1
SO
1
Figure 10.3 Example of SSB Connections
1. Clock
The serial clock can be selected from 8 internal clocks or an external clock, but since the H8/3847
Group chip provides the clock output, an external clock should not be selected. The transfer rate
can be selected with bits CKS2 to CKS0 in SCR1; since this is also the tail mark transfer rate, the
setting should provide for a serial clock cycle of at least 2 µs.
2. Data Transfer Format
The SCI1 transfer format is shown in figure 10.4. LSB-first transfer is used (i.e. transmission is
performed starting with the least significant bit of the transfer data). A tail mark is added after an
8-bit or 16-bit transfer.