Datasheet

Section 12 A/D Converter
Rev. 6.00 Aug 04, 2006 page 422 of 680
REJ09B0145-0600
Bits 3 to 0: Channel select (CH3 to CH0)
Bits 3 to 0 select the analog input channel.
The channel selection should be made while bit ADSF is cleared to 0.
Bit 3
CH3
Bit 2
CH2
Bit 1
CH1
Bit 0
CH0 Analog Input Channel
00**No channel selected (initial value)
0100AN
0
0101AN
1
0110AN
2
0111AN
3
1000AN
4
1001AN
5
1010AN
6
1011AN
7
1100AN
8
1101AN
9
1110AN
10
1111AN
11
*: Don’t care
12.2.3 A/D Start Register (ADSR)
Bit
Initial value
Read/Write
7
ADSF
0
R/W
6

1

5

1

4

1

3

1

0

1

2

1

1

1

The A/D start register (ADSR) is an 8-bit read/write register for starting and stopping A/D
conversion.
A/D conversion is started by writing 1 to the A/D start flag (ADSF) or by input of the designated
edge of the external trigger signal, which also sets ADSF to 1. When conversion is complete, the
converted data is set in ADRRH and ADRRL, and at the same time ADSF is cleared to 0.