Datasheet

Section 13 LCD Controller/Driver
Rev. 6.00 Aug 04, 2006 page 432 of 680
REJ09B0145-0600
13.1.2 Block Diagram
Figure 13.1 shows a block diagram of the LCD controller/driver.
φ/2 to φ/256
φ
w
CL 2
CL 1
SEG n, DO
LPCR
LCR
LCR2
Display timing generator
LCD RAM
(32 bytes)
Internal data bus
40-bit shift
register
LCD drive power supply
Segment
driver
Common
data latch
Common
driver
M
V
1
V 2
V 3
V SS
COM 1
COM 4
SEG 40 /CL 1 *
SEG 39 /CL 2 *
SEG
38 /DO*
SEG 37 /M*
SEG 36
SEG 1
Legend:
LPCR: LCD port control register
LCR: LCD control register
LCR2: LCD control register 2
Note: * The external expansion function for LCD segments is not implemented in the H8/38347 Group and H8/38447 Group.
V
0
Figure 13.1 Block Diagram of LCD Controller/Driver