Datasheet

Section 13 LCD Controller/Driver
Rev. 6.00 Aug 04, 2006 page 433 of 680
REJ09B0145-0600
13.1.3 Pin Configuration
Table 13.1 shows the LCD controller/driver pin configuration.
Table 13.1 Pin Configuration
Name Abbr. I/O Function
Segment output pins SEG
40
to SEG
1
Output LCD segment drive pins
All pins are multiplexed as port pins
(setting programmable)
Common output pins COM
4
to COM
1
Output LCD common drive pins
Pins can be used in parallel with static
or 1/2 duty
Segment external expansion
signal pin*
CL
1
Output Multiplexed as the display data latch
clock, SEG
40
CL
2
Output Multiplexed as the display data shift
clock, SEG
39
M Output Multiplexed as the LCD alternating
signal, SEG
37
DO Output Multiplexed as the serial display data,
SEG
38
LCD power supply pins V
0
, V
1
, V
2
, V
3
— Used when a bypass capacitor is
connected externally, and when an
external power supply circuit is used
Note: * The external expansion function for LCD segments is not implemented in the H8/38347
Group and H8/38447 Group.
13.1.4 Register Configuration
Table 13.2 shows the register configuration of the LCD controller/driver.
Table 13.2 LCD Controller/Driver Registers
Name Abbr. R/W Initial Value Address
LCD port control register LPCR R/W H'00 H'FFC0
LCD control register LCR R/W H'80 H'FFC1
LCD control register 2 LCR2 R/W H'60 H'FFC2
LCD RAM — R/W Undefined H'F740 to H'F753
Clock stop register 2 CKSTPR2 R/W H'FF H'FFFB