Datasheet

Section 13 LCD Controller/Driver
Rev. 6.00 Aug 04, 2006 page 440 of 680
REJ09B0145-0600
13.2.4 Clock Stop Register 2 (CKSTPR2)
Bit
Initial value
Read/Write
7
—
1
—
6
—
1
—
5
—
1
—
4
—
1
—
3
AECKSTP
1
R/W
0
LDCKSTP
1
R/W
2
WDCKSTP
1
R/W
1
PWCKSTP
1
R/W
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the LCD controller/driver is described here. For details of the
other bits, see the sections on the relevant modules.
Bit 0: LCD controller/driver module standby mode control (LDCKSTP)
Bit 0 controls setting and clearing of module standby mode for the LCD controller/driver.
Bit 0
LDCKSTP Description
0 LCD controller/driver is set to module standby mode
1 LCD controller/driver module standby mode is cleared (initial value)