Datasheet

Appendix B Internal I/O Registers
Rev. 6.00 Aug 04, 2006 page 580 of 680
REJ09B0145-0600
SCSR1—Serial Control Status Register 1 H'A1 SCI1
Bit
Initial value
Read/Write
7

1

6
SOL
0
R/W
5
ORER
0
R/(W)
4

1

3

1

0
STF
0
R/W
2

1

1
MTRF
0
R
Extension data bit
Overrun error flag
*
Start flag
0 Transfer operation stopped
Invalid
Transfer operation in progress
Starts transfer operation
1
Read
Write
Read
Write
Note: * Onl
y
a write of 0 for fla
g
clearin
g
is
p
ossible.
0 [Clearing condition]
After reading ORER = 1, cleared by writing 0 to ORER
1 [Setting condition]
When an external clock is used and the clock is input
after transfer is completed
0SO
1
pin output level is low
Changes SO
1
pin output to low level
SO
1
pin output level is high
Changes SO
1
pin output to high level
1
Read
Write
Read
Write
Tail mark transmission flag
0 Idle state, or 8-bit/16-bit data transfer in progress
1 Tail mark transmission in progress