Datasheet

Appendix B Internal I/O Registers
Rev. 6.00 Aug 04, 2006 page 603 of 680
REJ09B0145-0600
AMR—A/D Mode Register H'C6 A/D converter
Bit
Initial value
Read/Write
7
CKS
0
R/W
6
TRGE
0
R/W
4

1

3
CH3
0
R/W
0
CH0
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
Channel select
No channel selected
Bit 3
0
0
0
0
0
Bit 2
Analog Input Channel
* Don't care
CH3 CH2
0
CH1
CH0
Bit 1 Bit 0
0AN
1
1
0
1
1
00
1
0
1
0
1
1
1
0
0
External trigger select
0 Disables start of A/D conversion by external trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin ADTRG
5

1

4
AN
5
AN
6
AN
7
**
1
1
1
1
0
0
0
1
1
1
0
1
0AN
1
1
0
1
10
1
1
1
1
1
1
1
0
8
AN
9
AN
10
AN
11
AN
0
AN
1
AN
2
AN
3
Clock select
62/φ
Bit 7
0
Conversion PeriodCKS
31/φ1
62 µs
φ = 1 MHz
31 µs
12.4 µs
φ = 5 MHz

Conversion Time