Datasheet

Appendix B Internal I/O Registers
Rev. 6.00 Aug 04, 2006 page 621 of 680
REJ09B0145-0600
SYSCR2—System Control Register 2 H'F1 System control
Bit
Initial value
Read/Write
7

1

6

1

5

1

3
DTON
0
R/W
0
SA0
0
R/W
2
MSON
0
R/W
1
SA1
0
R/W
4
NESEL
1
R/W
Subactive mode clock select
0 φ /8
φ /4
0
1
1 φ /2
*
W
W
W
Direct transfer on flag
0 • When a SLEEP instruction is executed in active mode, a transition is
made to standby mode, watch mode, or sleep mode
1
• When a SLEEP instruction is executed in subactive mode, a transition is
made to watch mode or subsleep mode
• When a SLEEP instruction is executed in active (high-speed) mode, a direct
transition is made to active (medium-speed) mode if SSBY = 0, MSON = 1, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
• When a SLEEP instruction is executed in active (medium-speed) mode, a direct
transition is made to active (high-speed) mode if SSBY = 0, MSON = 0, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
• When a SLEEP instruction is executed in subactive mode, a direct
transition is made to active (high-speed) mode if SSBY = 1, TMA3 = 1, LSON = 0,
and MSON = 0, or to active (medium-speed) mode if SSBY = 1, TMA3 = 1,
LSON = 0, and MSON = 1
Medium speed on flag
0 Operates in active (high-speed) mode
1 Operates in active (medium-speed) mode
Noise elimination sampling frequency select
0 Sampling rate is φ /16
1 Sampling rate is φ /4
OSC
OSC
*: Don't care