Datasheet

Appendix B Internal I/O Registers
Rev. 6.00 Aug 04, 2006 page 622 of 680
REJ09B0145-0600
IEGR—IRQ Edge Select Register H'F2 System control
Bit
Initial value
Read/Write
7

0

6

1

4
IEG4
0
R/W
3
IEG3
0
R/W
0
IEG0
0
R/W
2
IEG2
0
R/W
1
IEG1
0
R/W
5

1

IRQ
0
edge select
0 Falling edge of IRQ
0
pin input is detected
Rising edge of IRQ
0
pin input is detected
1
IRQ
1
edge select
0 Falling edge of IRQ
1
, TMIC pin input is detected
Rising edge of IRQ
1
, TMIC pin input is detected
1
IRQ
2
edge select
0 Falling edge of IRQ
2
pin input is detected
Rising edge of IRQ
2
pin input is detected
1
IRQ
3
edge select
0 Falling edge of IRQ
3
, TMIF pin input is detected
Rising edge of IRQ
3
, TMIF pin input is detected
1
IRQ
4
edge select
0 Falling edge of IRQ
4
pin and ADTRG pin is detected
Rising edge of IRQ
4
pin and ADTRG pin is detected
1