Datasheet

Appendix B Internal I/O Registers
Rev. 6.00 Aug 04, 2006 page 627 of 680
REJ09B0145-0600
WPR—Wakeup Interrupt Request Register H'F9 System control
Bit
Initial value
Read/Write
7
IWPF7
0
R/(W)*
6
IWPF6
0
R/(W)*
5
IWPF5
0
R/(W)*
3
IWPF3
0
R/(W)*
0
IWPF0
0
R/(W)*
2
IWPF2
0
R/(W)*
1
IWPF1
0
R/(W)*
4
IWPF4
0
R/(W)*
0
[Clearing condition]
When IWPFn = 1, it is cleared by writing 0
(n = 7 to 0)
Note: * All bits can only be written with 0, for flag clearing.
Wakeup interrupt request register
1 [Setting condition]
When pin WKPn is designated for wakeup input and a
falling edge is input at that pin