Datasheet

Section 2 CPU
Rev. 6.00 Aug 04, 2006 page 39 of 680
REJ09B0145-0600
Section 2 CPU
2.1 Overview
The H8/300L CPU has sixteen 8-bit general registers, which can also be paired as eight 16-bit
registers. Its concise instruction set is designed for high-speed operation.
2.1.1 Features
Features of the H8/300L CPU are listed below.
General-register architecture
Sixteen 8-bit general registers, also usable as eight 16-bit general registers
Instruction set with 55 basic instructions, including:
Multiply and divide instructions
Powerful bit-manipulation instructions
Eight addressing modes
Register direct
Register indirect
Register indirect with displacement
Register indirect with post-increment or pre-decrement
Absolute address
Immediate
Program-counter relative
Memory indirect
64-Kbyte address space
High-speed operation
All frequently used instructions are executed in two to four states
High-speed arithmetic and logic operations
8- or 16-bit register-register add or subtract: 0.25 µs*
8 × 8-bit multiply: 1.75 µs*
16 ÷ 8-bit divide: 1.75 µs*