Specifications

16
Timer
One of the most important peripherals
on any microcontroller is the timer unit.
Timers have many uses in electronic
systems. They trigger the task switch of
real time operating systems,update
software real time clocks, control AC,DC
or stepper motors, check validity of
external signals (‘timeout’),count pulses
for example from phase quadrature
encoders and much more. Timers can
even act as accurate digital-to-analog
converters (DAC), if used as pulse-width-
modulator (PWM).
In order to accommodate all these
applications,Hitachi has developed 2
powerful and flexible timer units for
their 16-bit microcontrollers,as well as
several special-function timers,for
example separate PWM timers, watch
dog timers (WDT),low-power support
timers, etc. These two timer units are the
ITU on H8/300H,a 5-channel 16-bit
timer unit with up to 10 input
capture/output compare (IC/OC) and
the TPU on H8S,a 6-channel 16-bit
timer unit with up to 16 IC/OC.
An exception are the H8S/21xx devices.
H8S/21xx is aimed on very cost sensitive
application,where the advanced timer
functionality of the ITU/TPU is either
not needed or can be handled by the
high performance H8S CPU instead.
H8S/21xx has a 16-bit Free-Running-
Timer (FRT) with 4 IC and 2 OC and 3
timers with 8-bit. A separate 14-bit
PWM and 2 WDT (one with 32KHz
subclock) are also provided.
Together with the large integrated
memories and the other peripherals,
these powerful timers are aimed at
making single-chip systems possible,
where previously microncontrollers with
additional external devices had to be
used. Hence,more money then is being
spent on more powerful
microcontrollers,could be saved on
external devices,assembly cost,board
space, power supply and on reduced
counter measures against radiation. In
particular,electronic systems which
currently use 8-bit microcontrollers
should be reconsidered under these
aspects!
Integrated Timer
Unit (ITU)
The ITU consists of five separate 16-bit
timer channels,each of which can be
clocked from an internal derivative of the
system clock (ø,ø/2, ø/4 and ø/8) or
from an external pin. If the ø clock
option is selected,then the minimum
resolution of the timer is 62.5ns (ø =
16MHz). The standard timer functions
provided by the ITU include ten general
registers (GR),which can be used as
output compares or input captures. A
further four 16-bit buffer registers (BR)
reduce the overhead placed on the CPU
when servicing the timer block.
• Output Compare Functions
To create output waveforms or timed
interrupts, the ITU provides up to 10
output compare registers. The output
compares work by producing an
output of a pre-programmed level
and/or an interrupt when the value
in the counter matches the value
stored in one of the output compare
registers. The events that can be
initiated by these compare matches
are transitions on an output pin (to
high,to low or toggle),a CPU
interrupt (used for software timing
functions),clearing the counter and
the triggering of a DMA channel.
Channels 3 and 4 allow to produce a
pulse with duration down to one
clock cycle (62.5ns at 16MHz).
• Input Capture Functions
The ITU provides up to 10 channels
of input capture. In this mode the
timer can be set up so that a transition
on an input pin causes the value
currently in the count register to be
transferred into a capture register, thus
time stamping that particular event.
The ITU can be set to capture rising
edges,falling edges and either of
these. If required the timer unit can
also clear the timer when the
programmed external event occurs.
The two buffer registers (BRA and
BRB) provided in timer channels 3
and 4 can be used to buffer input
time stamps. This allows events which
occur very close to each other to be
time stamped using one capture pin.
This feature can also be used to
measure the width of an incoming
pulse, by programming the capture
input to be triggered on both the
rising and falling edges.
By using input captures to measure
the timing of external signals,very
accurate measurements of variables
such as frequency can be taken. The
user can be sure that the accuracy of
the measurement is not compromised
by interrupt response time, as it is
entirely a hardware driven facility.
It is also possible to initiate DMA
transfers when an input capture event
occurs. This allows time stamps to be
automatically placed in memory via
the DMA controller, without needing
to interrupt the CPU.