Specifications

20
between new patterns being output to
allow acceleration and deceleration of the
motor as shown by the velocity profile.
When the TPC,ITU and DMAC are
working together, the acceleration and
deceleration phases,as well as the steady
speed phase can be controlled with
minimal CPU overhead. The CPU only
needs to get involved when a transition
from one phase to another is made. This
is achieved by using a second memory to
I/O DMA channel to reload the timer
compare register
after each new
pattern has been
output. Again the
DMAC can take the
next step period data
from a table of values
stored in the
memory of the
system. Therefore,
by providing a table
of increasing or decreasing values the
motor can be decelerated or accelerated
with no CPU intervention (Figure 18).
Differences
between H8/300H
TPC and H8S PPG
The difference between the H8/300H TPC
and the H8S PPG is mainly the addition of
the bit inversion to each output.
Also, the PPG is supported by the H8S
DMA as well as the DTC.
Timing Pattern Controller (TPC)
Programmable Pulse Generator (PPG)
These peripherals allow to generate
digital output signals in synchronisation
with a timer pulse, so that one could look
at them as ‘real time outputs’. Such a
timer-driven digital output system allows
to generate a continuous stream of data
that appears on the pins precisely in the
intervals that the timer is programmed to,
without any ‘jitter’ that would be caused
by e. g. interrupt latencies in a system
where an interrupt service routine drives
the pins. Also the TPC and PPG allow to
do this without any CPU intervention,if
used together with DMA.
The TPC and PPG provide registers
called the ‘Next Data Register’. The data
in these registers will be transferred under
timer control to the ‘Port Data Registers’
(i.e. to the pins). The CPU,the DMA
or the DTC (where applicable) then have
time until the next ‘timer tick’ to copy
the next value from a data table in
memory to the ‘Next Data Register’.
This mechanism works independently for
four groups of four pins each,so that a
total of 16 pins can be driven in that way.
The TPC and the PPG are first of all
intended to drive stepper motors (up to
four) with only very little CPU
intervention required. However,they can
be used in many different ways as well. It
is quite easy, for example, to generate a
serial data stream if an additional serial
interface is required. It is even possible to
drive an LCD module without using any
LCD timing controller, thus eliminating a
entire peripheral chip in a microcontroller
system that is to be connected to an LCD
module. Such an application is described
in Hitachi’s application note No. 55
(using Hitachi’s SH microcontroller).
Hitachi’s application note No. 56 shows
how to set up such a TPC/ITU/DMA
system using MakeApp.
Stepper Motor
Control with the
TPC
Figure 17 shows how stepper motor
control can be performed using the ITU,
TPC and DMAC . In this example a
two phase stepper motor is being driven,
using complementary transistors. It is
therefore necessary to provide a dead
time between the switching of the phases
to eliminate any short circuit conditions
between the high side and low side
drivers.
Using compare matches from the ITU to
stimulate the DMAC,new pattern data is
provided to the TPC. This pattern data
represents the next phase drive pattern
required,and is stored in a memory table.
The DMAC uses its memory to I/O
function to transfer this data on each
compare match. The TPC also uses the
stimulus from the ITU to transfer the
contents of the NDR to the port. Using
a TPC mode where transitions on the
port from 0 to 1 (i.e. switching on a
phase) are only made on compare match
A,a dead time,equal to the value in
GRA,is inserted.
When controlling a stepper motor,
providing the phase patterns onto the
port pins is only part of the story. It is
also necessary to modify the time
DMA
Channel O
OCRA
OCRB
Clock
Memory
OCRA hosts Non-Overlap time
OCRB holds step pulse time
pins
motor
control
pulses
ITU
TPC
triggerData flow
DMA
Channel 1
DMA
Channel O
DMA
Channel O
output pattern
data table
step pulse period
data table
CPU intervention required
Motor velocity profile
Revolutions
Acceleration Deceleration
Figure 18
Figure 17