Specifications

6
Instruction Set
H8/300H has an instruction set which
suits the combined needs of HLL
programming and embedded applications.
It comprises of 62 instructions, with an
emphasis on arithmetic instructions,
address manipulation and bit processing.
More than half of all instructions have an
instruction length of only 2 Bytes making
very compact code. H8S extends the
instruction set to 69 instructions. BOLD
instructions are new on H8S.
In comparison with the H8/300 CPU
most of the data transfer,logical, shift and
arithmetic instructions are improved to
handle 16 and 32-bit data. New
instructions added to the H8/300H
include signed multiplication,sign
extension,16-bit branch instructions and
a software trap instruction.
H8S further improves the instruction set
by adding STM (store multiple) and
LDM (load multiple). These instructions
allow to evacuate multiple registers on to
the stack,thus drastically shortening the
time if compared with multiple PUSH
and POP. For example,pushing 4
registers onto the stack takes 40 states on
H8/300H and only 11 on H8S. Also
improved are some bit manipulations (to
include 16/32-bit absolute addressing)
and shift operations to support 2-bit
shifts.H8S/2655 also adds instructions to
support the Multiply-Accumulate-Unit.
Arithmetic
Instructions
In order to perform complex algorithms
such as digital filtering,H8S and
H8/300H are equipped with powerful
arithmetic instructions, including
addition and subtraction on 32-bit data
Function Instruction
Data transfer MOV, PUSH,POP, MOVTPE, MOVFPE, LDM, STM
Arithmetic ADD, SUB,ADDX,SUBX,INC,DEC,ADDS,SUBS,
operations DAA,DAS, MULXU,DIVXU,MULXS,DIVXS,CMP,
NEG,EXTS, EXTU, TAS, MAC, LDMAC, STMAC,
CLRMAC
Logic operations AND, OR, XOR,NOT
Shift operations SHAL,SHAR, SHLL, SHLR, ROTL,ROTR,ROTXL,ROTXR
Bit manipulation BSET,BCLR,BNOT,BTST,BAND,BIAND, BOR,BIOR
BXOR,BIXOR, BLD,BILD,BST,BIST
Branch Bcc, JMP, BSR,JSR, RTS
System control TRAPA,RTE, SLEEP, LDC,STC,ANDC,ORC,XORC, NOP
Operation H8S H8/300H
Add 32bit 50ns 125ns
operands
AND 32 bit 50ns 125ns
operands
multiply/divide 200ns/ 875ns
16bit operands 650ns
(32bit result,signed)
0
7
= 5
bit # 5
in CCR
Instruction: BTST R1L, R1H
R1L points to a bit position within R1H
R1L
R1H
0 0 0 0 1 0 1
0
Z
0 1 0 0 0 0 0
and multiplication of 16 x 16-bit data
and division of 32 / 16-bit data.
Multiplication and division are both
available as signed and unsigned
operations,which eliminate the need for
time consuming library calls. The table
below gives a guide to the execution
speed of various arithmetic instructions
with a clock of 16MHz (H8/300H) and
20MHz (H8S).
Figure 6