Datasheet

Section 13 Timer Z
Rev.5.00 Nov. 02, 2005 Page 239 of 500
REJ09B0027-0500
3. Output Inverse Timing by TFCR: The output level can be inverted by inverting the OLS1 and
OLS0 bits in TFCR in reset synchronous PWM mode or complementary PWM mode. Figure
13.46 shows the timing.
T 1 T 2
TFCR
Inverted
Timer Z
output pin
Address bus
TOER address
φ
Figure 13.46 Example of Output Inverse Timing of Timer Z by Writing to TFCR
4. Output Inverse Timing by POCR: The output level can be inverted by inverting the POLD,
POLC, and POLB bits in POCR in PWM mode. Figure 13.47 shows the timing.
T1 T2
TFCR
Address bus
POCR address
Timer Z
output pin
Inverted
φ
Figure 13.47 Example of Output Inverse Timing of Timer Z by Writing to POCR