Datasheet
Rev.5.00 Nov. 02, 2005 Page xvi of xxxii
Section 15 14-Bit PWM ....................................................................................255
15.1 Features.............................................................................................................................. 255
15.2 Input/Output Pin ................................................................................................................256
15.3 Register Descriptions......................................................................................................... 256
15.3.1 PWM Control Register (PWCR) .......................................................................... 256
15.3.2 PWM Data Registers U and L (PWDRU, PWDRL)............................................. 257
15.4 Operation ........................................................................................................................... 257
Section 16 Serial Communication Interface 3 (SCI3).......................................259
16.1 Features.............................................................................................................................. 259
16.2 Input/Output Pins...............................................................................................................262
16.3 Register Descriptions......................................................................................................... 262
16.3.1 Receive Shift Register (RSR) ............................................................................... 263
16.3.2 Receive Data Register (RDR)............................................................................... 263
16.3.3 Transmit Shift Register (TSR).............................................................................. 263
16.3.4 Transmit Data Register (TDR).............................................................................. 263
16.3.5 Serial Mode Register (SMR) ................................................................................ 264
16.3.6 Serial Control Register 3 (SCR3) ......................................................................... 265
16.3.7 Serial Status Register (SSR) ................................................................................. 267
16.3.8 Bit Rate Register (BRR) ....................................................................................... 269
16.4 Operation in Asynchronous Mode..................................................................................... 276
16.4.1 Clock..................................................................................................................... 276
16.4.2 SCI3 Initialization................................................................................................. 277
16.4.3 Data Transmission ................................................................................................ 278
16.4.4 Serial Data Reception ........................................................................................... 280
16.5 Operation in Clocked Synchronous Mode......................................................................... 284
16.5.1 Clock..................................................................................................................... 284
16.5.2 SCI3 Initialization................................................................................................. 284
16.5.3 Serial Data Transmission...................................................................................... 285
16.5.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 288
16.5.5 Simultaneous Serial Data Transmission and Reception........................................ 290
16.6 Multiprocessor Communication Function.......................................................................... 292
16.6.1 Multiprocessor Serial Data Transmission............................................................. 294
16.6.2 Multiprocessor Serial Data Reception .................................................................. 295
16.7 Interrupts............................................................................................................................ 299
16.8 Usage Notes....................................................................................................................... 300
16.8.1 Break Detection and Processing ........................................................................... 300
16.8.2 Mark State and Break Sending ............................................................................. 300
16.8.3 Receive Error Flags and Transmit Operations
(Clocked Synchronous Mode Only) ..................................................................... 300










