Datasheet

Rev.5.00 Nov. 02, 2005 Page 412 of 418
REJ09B0028-0500
Item Page Revision (See Manual for Details)
Section 5 Clock Pulse
Generators
Figure 5.3 Typical
Connection to Crystal
Resonator
70
1
2
C
1
C
2
OSC
OSC
12
C = C = 10 to 22 pF
12
Figure 5.5 Typical
Connection to Ceramic
Resonator
71
OSC
1
OSC
2
C
1
C
2
C
1
= 5 to 30 pF
C
2
= 5 to 30 pF
Bit Bit Name Description
3 NESEL Noise Elimination Sampling Frequency
Select
The subclock pulse generator generates the
watch clock signal (φ
W
) and the system clock
pulse generator generates the oscillator
clock (φ
OSC
). This bit selects the sampling
frequency of the oscillator clock when the
watch clock signal (φ
W
) is sampled. When
φ
OSC
= 4 to 20 MHz, clear NESEL to 0.
Section 6 Power-Down
Modes
6.1.1 System Control
Register 1 (SYSCR1)
76
Section 8 RAM 107
Note: * When the E7 or E8 is used, area H'F780 to H'FB7F
must not be accessed.
Bit Bit Name Description
4 TCSRWE Timer Control/Status Register WD Write Enable
Section 13 Watchdog
Timer
13.2.1 Timer
Control/Status Register
WD (TCSRWD)
184