Datasheet

Section 21 Electrical Characteristics
Rev.5.00 Nov. 02, 2005 Page 352 of 418
REJ09B0028-0500
t
REL
V
IL
RES
t
REL
V
IL
V
CC
× 0.7
V
CC
OSC1
Figure 21.2 RES Low Width Timing
V
IH
V
IL
t
IL
NMI
IRQ0 to IRQ3
WKP0 to WKP5
ADTRG
FTCI
FTIOA to FTIOD
TMCIV, TMRIV
TRGV
t
IH
Figure 21.3 Input Timing
SCL
V
IH
V
IL
t
STAH
t
BUF
P* S*
t
Sf
t
SCL
t
SDAH
t
SCLH
t
SCLL
SDA
Sr*
t
STAS
t
SP
t
STOS
t
SDAS
P*
Note: * S, P, and Sr represent the following:
S: Start condition
P: Stop condition
Sr: Retransmission start condition
Figure 21.4 I
2
C Bus Interface Input/Output Timing