Datasheet

Section 20 List of Registers
Rev.5.00 Nov. 02, 2005 Page 306 of 418
REJ09B0028-0500
Register Name
Abbre-
viation
Bit
No
Address
Module
Name
Data
Bus
Width
Access
State
System control register 1 SYSCR1 8 H'FFF0 Power-down 8 2
System control register 2 SYSCR2 8 H'FFF1 Power-down 8 2
Interrupt edge select register 1 IEGR1 8 H'FFF2 Interrupts 8 2
Interrupt edge select register 2 IEGR2 8 H'FFF3 Interrupts 8 2
Interrupt enable register 1 IENR1 8 H'FFF4 Interrupts 8 2
— — — H'FFF5 I/O port — —
Interrupt flag register 1 IRR1 8 H'FFF6 Interrupts 8 2
— — — H'FFE7 I/O port — —
Wake-up interrupt flag register IWPR 8 H'FFF8 Interrupts 8 2
Module standby control register 1 MSTCR1 8 H'FFF9 Power-down 8 2
— — — H'FFFA to
H'FFFF
— — —
• EEPROM
Register Name
Abbre-
viation
Bit
No
Address
Module
Name
Data
Bus
Width
Access
State
EEPROM slave address register — 8 H'FF09 EEPROM — —
EEPROM key register EKR 8 H'FF10 EEPROM — —
Notes: 1. LVDC: Low-voltage detection circuits (optional)
2. Only word access can be used.
3. WDT: Watchdog timer