Datasheet
Section 3 Exception Handling
Rev. 8.00 Mar. 09, 2010 Page 85 of 658
REJ09B0042-0800
Bit 7—Timer A Interrupt Request Flag (IRRTA)
Bit 7
IRRTA
Description
0 Clearing condition: (initial value)
When IRRTA = 1, it is cleared by writing 0
1 Setting condition:
When the timer A counter value overflows
Bit 6—Reserved
Bit 6 is reserved; it can only be written with 0.
Bit 5—Reserved
Bit 5 is reserved; it is always read as 1 and cannot be modified.
Bits 4 and 3—IRQ
4
and IRQ
3
Interrupt Request Flags (IRRI4 and IRRI3)
Bit n
IRRIn
Description
0 Clearing condition: (initial value)
When IRRIn = 1, it is cleared by writing 0
1 Setting condition:
When pin IRQn is designated for interrupt input and the designated signal edge is
input
(n = 4 or 3)
Bit 2—IRQAEC Interrupt Request Flag (IRREC2)
Bit 2
IRREC2
Description
0 Clearing condition: (initial value)
When IRREC2 = 1, it is cleared by writing 0
1 Setting condition:
When pin IRQAEC is designated for interrupt input and the designated signal edge is
input










