Datasheet

Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 354 of 658
REJ09B0042-0800
Table 10.6 Examples of BRR Settings for Various Bit Rates (Synchronous Mode) (2)
φ
5 MHz
8 MHz 10 MHz
Bit Rate
(bit/s)
n N Error n N Error n N Error
200 — — — — — — 0 12499 0
250 — — — 3 124 0 2 624 0
300 — — — — — — 0 8332 0
500 — — — 2 249 0 0 4999 0
1K — — — 2 124 0 0 2499 0
2.5K — — — 2 49 0 0 999 0
5K 0 249 0 2 24 0 0 499 0
10K 0 124 0 0 199 0 0 249 0
25K 0 49 0 0 79 0 0 99 0
50K 0 24 0 0 39 0 0 49 0
100K — — — 0 19 0 0 24 0
250K 0 4 0 0 7 0 0 9 0
500K — — — 0 3 0 0 4 0
1M — — — 0 1 0 — — —
Blank: Cannot be set.
— : A setting can be made, but an error will result.
Notes: The value set in BRR is given by the following equation:
φ
N =
(4 × 2
2n
× B)
– 1
where B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
φ: System clock frequency
n: Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10.7.)