Datasheet

Section 9 Timers
Rev. 8.00 Mar. 09, 2010 Page 310 of 658
REJ09B0042-0800
Port Mode Register 2 (PMR2)
Bit 7 6 5 4 3 2 1 0
— — POF1 — — WDCKS NCS IRQ0
Initial value 1 1 0 1 1 0 0 0
Read/Write — — R/W — — R/W R/W R/W
PMR2 is an 8-bit read/write register, mainly controlling the selection of pin functions for port 2.
Only the bit relating to the watchdog timer is described here. For details of the other bits, see
section 8, I/O Ports.
Bit 2—Watchdog Timer Source Clock Select (WDCKS)
This bit selects the watchdog timer source clock. Note that stabilization times for the H8/38024,
H8/38024S, and H8/38024R Group and for the H8/38124 Group are different.
• H8/38024, H8/38024S, H8/38024R Group
WDCKS Description
0 φ/8192 selected (initial value)
1 φw/32 selected
• H8/38124 Group
WDCKS Description
0 Selects clock based on timer mode register W (TMW) setting (initial value)
1 φw/32 selected