Datasheet
M16C/6S Group Timer A
R01DS0201EJ0502 Rev.5.02 page 89 of 203
Dec 25, 2012
4. Pulse Width Modulation (PWM) Mode
In PWM mode, the timer outputs pulses of a given width in succession (see Table 1.12.5). The counter
functions as either 16-bit pulse width modulator or 8-bit pulse width modulator. Figure 1.12.10 shows
TAiMR register in pulse width modulation mode. Figures 1.12.11 and 1.12.12 show examples of how a
16-bit pulse width modulator operates and how an 8-bit pulse width modulator operates.
Table 1.12.5. Specifications in PWM Mode
Item Specification
Count source f1, f2, f8, f32
Count operation • D
own-count (operating as an 8-bit or a 16-bit pulse width modulator)
•
The timer reloads a new value at a rising edge of PWM pulse and continues counting
• The timer is not affected by a trigger that occurs during counting
16-bit PWM • High level width n / fj n : set value of TAi register (i=o to 4)
• Cycle time (2
16
-1) / fj fixed fj: count source frequency (f1, f2, f8, f32)
8-bit PWM
•
High level width n x (m+1) / fj n : set value of TAiMR register high-order address
•
Cycle time (2
8
-1) x (m+1) / fj m : set value of TAiMR register low-order address
Count start condition • TAiS bit of TABSR register is set to “1” (= start counting)
• The TAiS bit = 1 and external trigger input from the TAiIN pin
• The TAiS bit = 1 and one of the following external triggers occurs
Timer Aj (j=i-1, except j=4 if i=0) overflow or underflow,
Timer Ak (k=i+1, except k=0 if i=4) overflow or underflow
Count stop condition TAiS bit is set to “0” (= stop counting)
Interrupt request generation timing
PWM pulse goes “L”
TAiIN pin function I/O port or trigger input
TAiOUT pin function Pulse output
Read from timer An indeterminate value is read by reading TAi register
Write to timer
•
When not counting and until the 1st count source is input after counting start
Value written to TAi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to TAi register is written to only reload register
(Transferred to counter when reloaded next)