Datasheet

Page 15
3. Memory
65fo5002,10.voN01.1.veR
0110-8300B30JER
puorG08/C23M
3. Memory
Figure 3.1 shows a memory map of the M32C/80 Group.
The M32C/80 Group provides 16-Mbyte address space addressed from 00000016 to FFFFFF16.
The fixed interrupt vectors are allocated from address FFFFDC16 to FFFFFF16. It stores the starting ad-
dress of each interrupt routine.
The internal RAM is allocated from address 00040016 to higher. For example, a 8-Kbyte internal RAM is
allocated from address 00040016 to 0023FF16. Besides storing data, it becomes stacks when the subrou-
tine is called or an interrupt is acknowledged.
SFRs, consisting of control registers for peripheral functions such as I/O port, A/D converter, serial I/O,
timers, is allocated from address 00000016 to 0003FF16. All blank spaces within SFRs are reserved and
cannot be accessed by users.
The special page vector table is addressed from FFFE0016 to FFFFDB16. It is used for the JMPS instruc-
tion and JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
In microprocessor mode, some spaces are reserved and cannot be accessed by users.
SFRs
Internal RAM
Reserved Space
External Space
BRK Instruction
Overflow
Undefined Instruction
FFFFFF 16
NMI
000000
16
000400 16
0023FF 16
010000 16
FFFFFF 16
Special Page
Vector Table
Address Match
Watchdog Timer
(1)
Reset
NOTE:
1. Watchdog timer interrupt and oscillation stop detection interrupt share vectors.
FFFFDC
16
FFFE00 16
Figure 3.1 Memory Map