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ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 16/32-Bit 32 MHz I/O number 85

To our customers,

Old Company Name in Catalogs and Other Documents

On April 1

, 2010, NEC Electronics Corporation merged with Renesas Technology

Corporation, and Renesas Electronics Corporation took over all the business of both

companies. Therefore, although the old company name remains in this document, it is a valid

Renesas Electronics document. We appreciate your understanding.

Renesas Electronics website: http://www.renesas.com

April 1

, 2010

Renesas Electronics Corporation

Issued by: Renesas Electronics Corporation (http://www.renesas.com)

Send any inquiries to http://www.renesas.com/inquiry

Summary of content (91 pages)

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To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.
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Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office.
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M32C/84 Group (M32C/84, M32C/84T) SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER REJ03B0047-0121 Rev.1.21 Jul. 08, 2005 1. Overview The M32C/84 group (M32C/84, M32C/84T) microcomputer is a single-chip control unit that utilizes highperformance silicon gate CMOS technology with the M32C/80 series CPU core. The M32C/84 group (M32C/84, M32C/84T) is available in 144-pin and 100-pin plastic molded LQFP/QFP packages.
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M32C/84 Group (M32C/84, M32C/84T) 1. Overview 1.2 Performance Overview Tables 1.1 and 1.2 list performance overview of the M32C/84 group (M32C/84, M32C/84T). Table 1.1 M32C/84 Group (M32C/84, M32C/84T) Performance (144-Pin Package) Characteristic Performance M32C/84 M32C/84T CPU Basic Instructions 108 instructions Shortest Instruction Execution Time 31.3 ns 31.3 ns (f(BCLK)=32 MHz, VCC1=4.2 V to 5.5 V) (f(BCLK)=32 MHz, VCC1=4.2 V to 5.5 V) 41.7 ns (f(BCLK)=24 MHz, VCC1=3.0 V to 5.
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M32C/84 Group (M32C/84, M32C/84T) 1. Overview Table 1.2 M32C/84 Group (M32C/84, M32C/84T) Performance (100-Pin Package) Characteristic Performance M32C/84 M32C/84T CPU Basic Instructions 108 instructions Shortest Instruction Execution Time 31.3 ns 31.3 ns (f(BCLK)=32 MHz, VCC1=4.2 V to 5.5 V) (f(BCLK)=32 MHz, VCC1=4.2 V to 5.5 V) 41.7 ns (f(BCLK)=24 MHz, V CC1=3.0 V to 5.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) 1.3 Block Diagram Figure 1.1 shows a block diagram of the M32C/84 group (M32C/84, M32C/84T) microcomputer. 8 8 8 8 8 8 Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 8 Port P6 Peripheral Functions DMAC DMACII CRC Calculation Circuit (CCITT): X16+X12+X5+1 INTB ISP R3 USP A0 Port P14 7 SVF FB SVP SB VCT Port P15 Port P11 8 5 Port P12 8 Port P13 8 (Note 1) NOTES: 1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) 1.4 Product Information Table 1.3 lists product information. Figure 1.2 shows the product numbering system. Table 1.
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1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) 1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.4 Pin Characteristics for 144-Pin Package Pin No.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.4 Pin Characteristics for 144-Pin Package (Continued) Pin No.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.4 Pin Characteristics for 144-Pin Package (Continued) Pin No.
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Rev. 1.21 Jul. 08, 2005 2. P70 and P71 are ports for the N-channel open drain output. Figure 1.
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1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.5 Pin Characteristics for 100-Pin Package Package Pin No.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.5 Pin Characteristics for 100-Pin Package (Continued) Package Pin No.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) 1.6 Pin Description Table 1.6 Pin Description (100-Pin and 144-Pin Packages) Classsfication Supply Voltage - Apply 3.0 to 5.5V to both VCC1 and VCC2 pins. Apply 0V to the I VCC1 VSS pin. VCC1 ≥ VCC2(1, 2) Supplies power to the A/D converter. Connect the AVCC pin to AVSS ____________ RESET I VCC1 VCC1 and the AVSS pin to VSS ___________ The microcomputer is in a reset state when "L" is applied to the RESET pin CNVSS I VCC1 Switches processor mode.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.
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1. Overview M32C/84 Group (M32C/84, M32C/84T) Table 1.6 Pin Description (144-Pin Package only) (Continued) Classsfication Symbol I/O Type A/D Converter I/O Ports AN150 to AN157 P110 to P114 I I/O Supply Function Voltage Analog input pins for the A/D converter VCC1 I/O ports having equivalent functions to P0 VCC2 P120 to P127 P130 to P137 P140 to P146 P150 to P157 I : Input O : Output Rev. 1.21 Jul.
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2. Central Processing Unit (CPU) M32C/84 Group (M32C/84, M32C/84T) 2. Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. The register bank is comprised of 8 registers (R0, R1, R2, R3, A0, A1, SB and FB) out of 28 CPU registers. Two sets of register banks are provided.
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M32C/84 Group (M32C/84, M32C/84T) 2. Central Processing Unit (CPU) 2.1 General Registers 2.1.1 Data Registers (R0, R1, R2 and R3) R0, R1, R2 and R3 are 16-bit registers for transfer, arithmetic and logic operations. R0 and R1 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R0 can be combined with R2 to be used as a 32-bit data register (R2R0). The same applies to R1 and R3. 2.1.
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M32C/84 Group (M32C/84, M32C/84T) 2. Central Processing Unit (CPU) 2.1.8.5 Register Bank Select Flag (B) The register bank 0 is selected when the B flag is set to "0". The register bank 1 is selected when this flag is set to "1". 2.1.8.6 Overflow Flag (O) The O flag is set to "1" when the result of an arithmetic operation overflows; otherwise "0". 2.1.8.7 Interrupt Enable Flag (I) The I flag enables a maskable interrupt.
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3. Memory M32C/84 Group (M32C/84, M32C/84T) 3. Memory Figure 3.1 shows a memory map of the M32C/84 group (M32C/84, M32C/84T). The M32C/84 group (M32C/84, M32C/84T) provides 16-Mbyte address space from addresses 00000016 to FFFFFF16. The internal ROM is allocated lower addresses beginning with address FFFFFF16. For example, a 64Kbyte internal ROM is allocated in addresses FF000016 to FFFFFF16. The fixed interrupt vectors are allocated addresses FFFFDC16 to FFFFFF16.
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4. Special Function Registers (SFR) M32C/84 Group (M32C/84, M32C/84T) 4.
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4.
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M32C/84 Group (M32C/84, M32C/84T) Address 006016 006116 006216 006316 006416 006516 006616 006716 006816 006916 006A16 006B16 006C16 006D16 006E16 006F16 007016 007116 007216 007316 007416 007516 007616 007716 007816 007916 007A16 007B16 007C16 007D16 007E16 007F16 008016 008116 008216 008316 008416 008516 008616 008716 008816 008916 008A16 008B16 008C16 008D16 008E16 008F16 Register 4.
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M32C/84 Group (M32C/84, M32C/84T) Address 00F016 00F116 00F216 00F316 00F416 00F516 00F616 00F716 00F816 00F916 00FA16 00FB16 00FC16 00FD16 00FE16 00FF16 010016 010116 010216 010316 010416 010516 010616 010716 010816 010916 010A16 010B16 010C16 010D16 010E16 010F16 011016 011116 011216 011316 011416 011516 011616 011716 011816 011916 011A16 011B16 011C16 011D16 011E16 011F16 4.
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M32C/84 Group (M32C/84, M32C/84T) Address 021016 021116 021216 021316 021416 021516 021616 021716 021816 021916 021A16 021B16 021C16 021D16 021E16 021F16 022016 022116 022216 022316 022416 022516 022616 022716 022816 022916 022A16 022B16 022C16 022D16 022E16 022F16 023016 023116 023216 023316 023416 023516 023616 023716 023816 Register 4.
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M32C/84 Group (M32C/84, M32C/84T) 5. Electrical Characteristics (M32C/84) 5. Electrical Characteristics 5.1 Electrical Characteristics (M32C/84) Table 5.1 Absolute Maximum Ratings Symbol Parameter Condition Value Unit VCC1, VCC2 Supply Voltage VCC1=AVCC -0.3 to 6.0 V VCC2 Supply Voltage - -0.3 to VCC1 V AVCC Analog Supply Voltage VCC1=AVCC -0.3 to 6.0 V VI Input Voltage -0.3 to VCC1+0.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Table 5.2 Recommended Operating Conditions (VCC1= VCC2=3.0V to 5.5V at Topr=– 20 to 85oC unless otherwise specified) Symbol Parameter Standard Min. 3.0 Typ. 5.0 VCC1 Max. 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Table 5.2 Recommended Operating Conditions (Continued) (VCC1=VCC2=3.0V to 5.5V at Topr=–20 to 85oC unless otherwise specified) Symbol f(BCLK) f(XIN) f(XCIN) Standard Parameter CPU Clock Frequency Main Clock Input Frequency Min. 32 MHz VCC1=3.0 to 5.5V 0 24 MHz VCC1=4.2 to 5.5V 0 32 MHz VCC1=3.0 to 5.5V 0 24 MHz 32.768 50 kHz 1 2 MHz 10 32 MHz 10 24 MHz VCC1=5.0V 5 ms VCC1=3.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.3 Electrical Characteristics (VCC1=VCC2=4.2 to 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.3 Electrical Characteristics (Continued) (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr= –20 to 85oC, f(BCLK)=32MHZ unless otherwise specified) Symbol ICC Parameter Power Supply Current In single-chip mode, output pins are left open and other pins are connected to VSS. Standard Measurement Condition f(BCLK)=32 MHz, Square wave, No division f(BCLK)=32 kHz, In low-power consumption mode, Program running on ROM Min.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.4 A/D Conversion Characteristics (VCC1=VCC2=AVCC=VREF=4.2 to 5.5V, Vss= AVSS = 0V at Topr=–20 to 85oC, f(BCLK) = 32MHZ unless otherwise specified) Symbol Parameter Standard Measurement Condition Min. - INL Resolution VREF=VCC1 Integral Nonlinearity Error DNL Unit Typ. Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.6 Flash Memory Version Electrical Characteristics (VCC1=4.5 to 5.5V, 3.3 to 3.6V at Topr=0 to 60oC unless otherwise specified) Symbol - t PS Standard Parameter Min. 100 Program and Erase Endurance(2) Typ. Max. Unit cycles - Word Program Time (VCC1=5.0V, Topr=25° C) 25 200 µs - Lock Bit Program Time Block Erase Time (VCC1=5.0V, Topr=25° C) 25 0.3 0.3 0.5 0.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.7 Voltage Detection Circuit Electrical Characteristics (VCC1=VCC2=3.0 to 5.5V, Vss=0V at Topr=25oC unless otherwise specified) Symbol Parameter Standard Measurement Condition Min. Vdet4 Low Voltage Detection Voltage(1) Voltage(1) Typ. Unit Max. 3.8 Vdet3 Reset Space Detection Vdet3s Low Voltage Reset Hold Voltage Vdet3r Low Voltage Reset Release Voltage(2) V 3.0 VCC1=3.0 to 5.5V V 2.0 V 3.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr=–20 to 85oC unless otherwise specified) Table 5.9 External Clock Input Symbol Parameter Standard Min. Unit Max. tc External Clock Input Cycle Time 31.25 ns tw(H) External Clock Input High ("H") Width 13.75 ns 13.75 tw(L) External Clock Input Low ("L") Width tr External Clock Rise Time 5 ns ns tf External Clock Fall Time 5 ns Table 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr=–20 to 85oC unless otherwise specified) Table 5.11 Timer A Input (Count Source Input in Event Counter Mode) Symbol Standard Parameter Min. Unit Max. tc(TA) TAiIN Input Cycle Time 100 ns tw(TAH) TAiIN Input High ("H") Width 40 ns tw(TAL) TAiIN Input Low ("L") Width 40 ns Table 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.16 Timer B Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min. Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Switching Characteristics (VCC1 = VCC2 = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.22 Memory Expansion Mode and Microprocessor Mode (when accessing external memory space) Symbol Parameter td(BCLK-AD) Address Output Delay Time th(BCLK-AD) Address Output Hold Time (BCLK standard) Measurement Condition Standard Min. 18 -3 standard)(3) Unit Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Switching Characteristics (VCC = 4.2 to 5.5V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.23 Memory Expansion Mode and Microprocessor Mode (when accessing an external memory space with the multiplexed bus) Symbol Parameter Measurement Condition Standard Min. Unit Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V P0 P1 P2 P3 P4 P5 P6 P7 30pF P8 P9 P10 P11 P12 P13 Note 1 P14 P15 NOTES: 1. P11 to P15 are provided in the 144-pin package only. Figure 5.2 P0 to P15 Measurement Circuit Rev. 1.21 Jul.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Vcc1=Vcc2=5V Memory Expansion Mode and Microprocessor Mode (when accessing an external memory space) [ Read Timing ] (1φ +1φ Bus Cycle) BCLK td(BCLK-CS) th(BCLK-CS) 18ns.max(1) -3ns.min CSi th(RD-CS) tcyc 0ns.min td(BCLK-AD) th(BCLK-AD) 18ns.max(1) -3ns.min ADi BHE th(RD-AD) 0ns.min td(BCLK-RD) 18ns.max RD th(BCLK-RD) tac1(RD-DB)(2) -5ns.min tac1(AD-DB)(2) DB Hi-Z tsu(DB-BCLK) th(RD-DB) 26ns.min(1) 0ns.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Vcc1=Vcc2=5V Memory Expansion Mode and Microprocessor Mode (when accessing an external memory space with the multiplexed bus) [ Read Timing ] (2φ +2φ Bus Cycle) BCLK td(BCLK-ALE) th(BCLK-ALE) -2ns.min 18ns.max ALE th(BCLK-CS) tcyc td(BCLK-CS) -3ns.min 18ns.max th(RD-CS)(1) CSi td(AD-ALE)(1) th(ALE-AD) ADi /DBi Address (1) tsu(DB-BCLK) 26ns.min Data input tdz(RD-AD) Address 8ns.
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5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Vcc1=Vcc2=5V Memory Expansion Mode and Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input th(BCLK–RDY) tsu(RDY–BCLK) BCLK tsu(HOLD–BCLK) th(BCLK–HOLD) HOLD Input HLDA Output td(BCLK–HLDA) P0, P1, P2, P3, P4, P50 to P52 td(BCLK–HLDA) Hi–Z Measurement Conditions • VCC1=VCC2=4.2 to 5.5V • Input high and low voltage: VIH=4.0V, VIL=1.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Table 5.24 Electrical Characteristics (VCC1=VCC2=3.0 to 3.6V, VSS=0V at Topr = –20 to 85oC, f(BCLK)=24MHZ unless otherwise specified) Symbol VOH Parameter Output High ("H") Voltage P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOH=-1mA P50-P57, P110-P114, P120-P127, P130-P137 P60-P67, P72-P77, P80-P84, P86, P87, P90P97, P100-P107, P140-P146, P150-P157(1) XOUT IOH=-0.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Table 5.25 A/D Conversion Characteristics (VCC1=VCC2=AVCC=VREF= 3.0 to 3.6V, VSS=AVSS=0V at Topr = –20 to 85oC, f(BCLK) = 24MHZ unless otherwise specified) Symbol Parameter Standard Measurement Condition Unit Min. Typ. Max. - Resolution INL DNL Integral Nonlinearity Error No S&H (8-bit) VREF=VCC1 10 Bits VCC1=VCC2=VREF=3.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Timing Requirements (VCC1=VCC2= 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.27 External Clock Input Symbol Parameter Standard Min. Unit Max. tc External Clock Input Cycle Time 41 ns tw(H) External Clock Input High ("H") Width 18 ns 18 tw(L) External Clock Input Low ("L") Width tr External Clock Rise Time 5 ns tf External Clock Fall Time 5 ns ns Table 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Timing Requirements (VCC1=VCC2= 3.0 to 3.6V, VSS= 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.29 Timer A Input (Count Source Input in Event Counter Mode) Symbol Standard Parameter Min. Unit Max. tc(TA) TAiIN Input Cycle Time 100 ns tw(TAH) TAiIN Input High ("H") Width 40 ns tw(TAL) TAiIN Input Low ("L") Width 40 ns Table 5.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Timing Requirements (VCC1=VCC2= 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.34 Timer B Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min. Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Switching Characteristics (VCC1=VCC2=3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.40 Memory Expansion Mode and Microprocessor Mode (when accessing external memory space) Symbol Measurement Condition Parameter Standard Min. Unit Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=3.3V Switching Characteristics (VCC1 = VCC2 = 3.0 to 3.6V, VSS = 0V at Topr = –20 to 85oC unless otherwise specified) Table 5.41 Memory Expansion Mode and Microprocessor Mode (when accessing an external memory space with the multiplexed bus) Symbol Measurement Condition Parameter Standard Min. Unit Max.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Vcc1=Vcc2=3.3V Memory Expansion Mode and Microprocessor Mode (when accessing an external memory space) [Read Timing] (1φ + 1φ Bus Cycles) BCLK td(BCLK-CS) th(BCLK-CS) 0ns.min 18ns.max(1) CSi th(RD-CS) tcyc 0ns.min td(BCLK-AD) th(BCLK-AD) 18ns.max(1) ADi BHE 0ns.min td(BCLK-RD) 18ns.max th(RD-AD) 0ns.min RD th(BCLK-RD) tac1(RD-DB)(2) -3ns.min tac1(AD-DB)(2) DB Hi-Z tsu(DB-BCLK) th(RD-DB) 30ns.min(1) 0ns.
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M32C/84 Group (M32C/84, M32C/84T) 5. Electrical Characteristics (M32C/84) Vcc1=Vcc2=3.3V Memory Expansion Mode and Microprocessor Mode (when accessing external memory space and using the multiplexed bus) [ Read Timing ] (2φ +2φ Bus Cycles) BCLK td(BCLK-ALE) th(BCLK-ALE) 18ns.max -2ns.min ALE th(BCLK-CS) tcyc td(BCLK-CS) 0ns.min 18ns.max th(RD-CS)(1) CSi td(AD-ALE)(1) th(ALE-AD) ADi /DBi (1) Address tsu(DB-BCLK) 30ns.min Data input tdz(RD-AD) Address 8ns.
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5. Electrical Characteristics (M32C/84) M32C/84 Group (M32C/84, M32C/84T) Vcc1=Vcc2=3.
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M32C/84 Group (M32C/84, M32C/84T) 5. Electrical Characteristics (M32C/84) Vcc1=Vcc2=3.3V Memory Expansion Mode and Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input tsu(RDY–BCLK) BCLK tsu(HOLD–BCLK) th(BCLK–HOLD) HOLD input HLDA output td(BCLK–HLDA) td(BCLK–HLDA) P0, P1, P2, P3, P4, P50 to P52 Hi–Z Measurement Conditions: • VCC1=VCC2=3.0 to 3.6V • Input high and low voltage: VIH=2.4V, VIL=0.
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M32C/84 Group (M32C/84, M32C/84T) 5. Electrical Characteristics (M32C/84T) 5.2 Electrical Characteristics (M32C/84T) Table 5.42 Absolute Maximum Ratings Symbol VCC1, VCC2 Parameter Supply Voltage A V CC Analog Supply Voltage VI Input Voltage Condition Value Unit VCC1=VCC2=AVCC -0.3 to 6.0 V VCC1=VCC2=AVCC RESET, CNVSS, BYTE, P60-P67, P72-P77, P80-P87, P90-P97, P100-P107, P140-P146, -0.3 to 6.0 V -0.3 to VCC1+0.
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M32C/84 Group (M32C/84, M32C/84T) 5. Electrical Characteristics (M32C/84T) Table 5.43 Recommended Operating Conditions (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version) unless otherwise specified) Symbol Parameter Standard Min. 4.2 Typ. 5.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) Table 5.43 Recommended Operating Conditions (Continued) (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version) unless otherwise specified) Symbol Standard Parameter Min. Typ. Max. Unit f(BCLK) CPU Input Frequency VCC1=4.2 to 5.5V 0 32 MHz f(XIN) Main Clock Input Frequency VCC1=4.2 to 5.5V 0 32 MHz f(XCIN) Sub Clock Frequency 32.768 50 kHz f(Ring) On-chip Oscillator Frequency (VCC1=VCC2=5.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.44 Electrical Characteristics (VCC1=VCC2=4.2 to 5.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.44 Electrical Characteristics (Continued) (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version), f(BCLK)=32MHz unless otherwise specified) Symbol I CC Parameter Measurement Condition Power Supply Current In single-chip mode, output pins are left open and other pins are connected to VSS. Standard Min.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.45 A/D Conversion Characteristics (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr= -40 to 85oC (T version), f(BCLK)=32MHz unless otherwise specified) Symbol Parameter Standard Measurement Condition Min. - INL Resolution VREF=VCC1 Integral Nonlinearity Error DNL RLADDER tCONV Unit Typ. Max.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Table 5.47 Flash Memory Version Electrical Characteristics (VCC1=4.5 to 5.5V, 3.3 to 3.6V at Topr= 0 to 60oC unless otherwise specified) Symbol Standard Parameter Min. 100 Typ. Max. Unit - Program and Erase Endurance(2) - Word Program Time (VCC1=5.0V, Topr=25° C) 25 200 µs - Lock Bit Program Time Block Erase Time (VCC1=5.0V, Topr=25° C) 25 0.3 0.3 0.5 0.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr= -40 to 85oC (T version) unless otherwise specified) Table 5.49 External Clock Input Symbol Parameter Standard Min. Max. Unit tc External Clock Input Cycle Time 31.25 ns tw(H) External Clock Input High ("H") Width 13.75 ns tw(L) External Clock Input Low ("L") Width 13.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr= -40 to 85oC (T version) unless otherwise specified) Table 5.50 Timer A Input (Count Source Input in Event Counter Mode) Symbol Standard Parameter Min. Unit Max. tc(TA) TAiIN Input Cycle Time 100 ns tw(TAH) TAiIN Input High ("H") Width 40 ns tw(TAL) TAiIN Input Low ("L") Width 40 ns Table 5.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V Timing Requirements (VCC1=VCC2=4.2 to 5.5V, VSS=0V at Topr= -40 to 85oC (T version) unless otherwise specified) Table 5.55 Timer B Input (Count Source Input in Event Counter Mode) Symbol Parameter Standard Min. Max.
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5. Electrical Characteristics (M32C/84T) M32C/84 Group (M32C/84, M32C/84T) VCC1=VCC2=5V P0 P1 P2 P3 P4 P5 P6 P7 30pF P8 P9 P10 P11 P12 P13 Note 1 P14 P15 NOTES: 1. P11 to P15 are provided in the 144-pin package only. Figure 5.12 P0 to P15 Measurement Circuit Rev. 1.21 Jul.
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M32C/84 Group (M32C/84, M32C/84T) 5.
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Package Dimensions M32C/84 Group (M32C/84, M32C/84T) Package Dimensions PLQP0144KA-A (144P6Q-A) Plastic 144pin 20✕20mm body LQFP Previous Code 144P6Q-A RENESAS Code PLQP0144KA-A Mass[Typ.] 1.2g MD e JEITA Package Code P-LQFP144-20x20-0.50 b2 D ME HD 144 109 1 l2 Recommended Mount Pad 108 36 A A1 A2 b c D E e HD HE L L1 Lp HE E Symbol 73 37 72 A L1 F e L M Detail F c x A1 b y A3 A2 A3 Lp PRQP0100JB-A (100P6S-A) JEITA Package Code P-QFP100-14x20-0.
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Package Dimensions M32C/84 Group (M32C/84, M32C/84T) PLQP0100KB-A (100P6Q-A) Plastic 100pin 14✕14mm body LQFP Previous Code 100P6Q-A Mass[Typ.] 0.6g MD b2 HD ME RENESAS Code PLQP0100KB-A e JEITA Package Code P-LQFP100-14x14-0.50 D 100 76 l2 Recommended Mount Pad 75 1 A A1 A2 b c D E e HD HE L L1 Lp HE E Symbol 51 25 26 50 A L1 F A3 M y L Detail F Rev. 1.21 Jul. 08, 2005 Page 85 of 85 Lp c x A1 b A3 A2 e x y b2 I2 MD ME Dimension in Millimeters Min Nom Max – – 1.7 0.
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REVISION HISTORY Rev. M32C/84 Group (M32C/84, M32C/84T) Datasheet Date 0.40 Sep. 30, 2003 Page – 0.50 Feb. 05, 2004 2, 3 5 6 23 24 44 0.51 Feb. 09, 2004 50 57 68 68 69 0.52 Mar.12, 2004 2, 3 48 50 61 Description Summary New Document Overview • Table 1.1 and Table 1.2 M32C/84 Group Performance Values for Shortest Instruction Execution Time and Power Consumption” modified • Figure 1.2 ROM/RAM Capacity Products added • Table 1.3 M32C/84 Group Products added • Figure 1.
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REVISION HISTORY Rev. M32C/84 Group (M32C/84, M32C/84T) Datasheet Date Description Summary Page 1.00 Jun.01, 2004 M32C/84T (High-reliability version) added All Pages Words standardized: On-chip oscillator, A/D converter and D/A converter Overview 1 • 1.1 Applications Automobiles added 2, 3 • Table 1.1 and Table 1.2 M32C/84 Group (M32C/84, M32C/84T) Performance M32C/84T added; note 3 added 4 • Figure 1.1 M32C/84 Group (M32C/84, M32C/84T) Block Diagram Note 3 added 5 • 1.
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REVISION HISTORY Rev. M32C/84 Group (M32C/84, M32C/84T) Datasheet Date Description Summary Page 63 66 67 1.10 Jun.28, 2004 72 5 6 1.20 Apr.18, 2005 2, 3 6 16, 17 22 24 46 49 50 58 61 63 75 78 1.21 Jul.08, 2005 37 45 51 • Table 5.28 Memory Expassion Mode and Microprocessor Mode tsu (DBBCLK), tsu(RDY-BCLK) and tsu(HOLD-BCLK) value modified • Table 5.40 Memory Expassion Mode and Microprocessor Mode equetion of th(WR-DB) modified • Table 5.
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REVISION HISTORY Rev. M32C/84 Group (M32C/84, M32C/84T) Datasheet Date Description Summary Page 57 58 63 68 69 74 78 • Figure 5.3 VCC1=VCC2=5V Timing Diagram (1) tw(ER) expression on Note 3 modified; tcyc expression added • Figure 5.4 VCC1=VCC2=5V Timing Diagram (2) tac2(AD-DB) expression on Note 1 modified; th(ALE-AD) expressions on Notes 1 and 2 modified; tcyc expression added • Table 5.