User manual

Header
Pin
Generic Header
Name
RSK board Signal
Name
Device Pin Header
Pin
Generic
Header Name
RSK board Signal
Name
Device Pin
1 AD4 AN12 64 2 AD5 AN13 63
3 AD6 AN14 62 4 AD7 AN15 61
5 CAN1TX --- --- 6 CAN1RX --- ---
7 CAN2TX --- --- 8 CAN2RX --- ---
9 AD8 AN16 60 10 AD9 AN17 59
11 AD10 AN18 58 12 AD11 AN19 57
13 TIOCOA TRGIOA 1 14 TIOCOB TRGIOB 80
15 TIOCOC TRCIOB 16 16 M2_TRISTn --- ---
17 TCLKC TRGCLKA 4 18 TCLKD TRGCLKB 3
19 M2_Up --- --- 20 M2_Un --- ---
21 M2_Vp --- --- 22 M2_Vn --- ---
23 M2_Wp --- --- 24 M2_Wn --- ---
Table 9-7: JA5 Standard Generic Header
Header
Pin
Generic Header
Name
RSK board
Signal Name
Device Pin Header
Pin
Generic
Header Name
RSK board Signal
Name
Device Pin
1 DREQ --- --- 2 DACK NC ---
3 TEND --- --- 4 STBYn NC ---
5 RS232TX RS232TX --- 6 RS232RX RS232RX ---
7 SCIbRX RXD0 51* 8 SCIbTX TXD0 52*
9 SCIcTX TXD1 74 10 SCIbCK CLK0 50*
11 SCIcCK CLK1 75 12 SCIcRX RXD1 73
13 Reserved --- --- 14 Reserved --- ---
15 Reserved --- --- 16 Reserved --- ---
17 Reserved --- --- 18 Reserved --- ---
19 Reserved --- --- 20 Reserved --- ---
21 Reserved --- --- 22 Reserved --- ---
23 Unregulated_Vcc --- --- 24 Vss GROUND ---
Table 9-8: JA6 Standard Generic Header
Header
Pin
Generic Header
Name
RSK board
Signal Name
Device Pin
1 VBAT VBAT ---
2 LIN LIN 51* & 52*
3 GROUND GROUND ---
Table 9-9: LIN Header
Note: Pins marked with ‘*’ are connected via option links.
25