Datasheet

Section 5 Interrupt Controller
Rev. 2.00 Sep. 28, 2009 Page 91 of 870
REJ09B0429-0200
5.6.3 Interrupt Exception Handling Sequence
Figure 5.7 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.