Datasheet

Section 6 Bus Controller (BSC)
Rev. 2.00 Sep. 28, 2009 Page 109 of 870
REJ09B0429-0200
• When ADMXE = 0
Bit Bit Name
Initial
Value
R/W Description
2 to 0 ⎯ All 1 R/W Reserved
• When ADMXE = 1
Bit Bit Name
Initial
Value
R/W Description
2 WC22 1 R/W Address-Data Multiplex Extended Area Address Cycle
Wait Count 2
Selects the number of program wait states to be inserted
into the address cycle for access to the address-data
multiplex extended area.
0: Program wait state is not inserted
1: 1 program wait state is inserted in the address cycle
1, 0 ⎯ All 1 R/W Reserved
6.3.5 System Control Register 2 (SYSCR2)
SYSCR2 controls the address-data multiplex operation.
Bit Bit Name Initial Value R/W Description
7 to 4 ⎯ All 0 R/W Reserved
The initial value should not be changed.
3 ADMXE 0 R/W Address-Data Multiplex Bus Interface Enable
0: Normal extended bus interface
1: Address data multiplex extended bus interface
2 to 0 ⎯ All 0 R/W Reserved
The initial value should not be changed.