Datasheet

Section 6 Bus Controller (BSC)
Rev. 2.00 Sep. 28, 2009 Page 121 of 870
REJ09B0429-0200
6.5.2 Valid Strobes
Table 6.13 shows the data buses used and valid strobes for each access space.
In a read, the RD signal is valid for both the upper and lower halves of the data bus. In a write, the
HWR signal is valid for the upper half of the data bus, and the LWR signal for the lower half.
Table 6.13 Data Buses Used and Valid Strobes
Area
Access
Size
Read/
Write
Address
Valid
Strobe
Upper Data Bus
(D15 to D8/
AD15 to AD8)
Lower Data
Bus (D7 to
D0/AD7 to
AD0)
Read — RD Ports or others
8-bit access
space
Byte
Write — HWR
Valid
Ports or others
Read — RD 8-bit access
space
(in address-
data multiplex
extended
mode)
Byte
Write — HWR
Valid Ports or others
Even Valid Invalid Read
Odd
RD
Invalid Valid
Even HWR Valid Undefined
Byte
Write
Odd LWR Undefined Valid
16-bit access
space
Word Read — RD Valid Valid
Write — HWR, LWR Valid Valid
[Legend]
Undefined: Undefined data is output.
Invalid: Input state with the input value ignored.
Ports or others: Used as ports or I/O pins for on-chip peripheral modules, and are not used as the
data bus.