Datasheet

Section 6 Bus Controller (BSC)
Rev. 2.00 Sep. 28, 2009 Page 142 of 870
REJ09B0429-0200
6.5.6 Wait Control
When accessing the external address space, this LSI can extend the bus cycle by inserting one or
more wait states (T
W
). There are three ways of inserting wait states: Program wait insertion, pin
wait insertion using the WAIT pin, and the combination of program wait and the WAIT pin.
(1) In Normal Extended Mode
(a) Program Wait Mode
A specified number of wait states T
W
are always inserted between the T
2
state and T
3
state when
accessing the external address space. The number of wait states T
W
is specified by the settings of
the WC1 and WC0 bits in WSCR (the WC11 and WC10 bits in WSCR2 for the 256-Kbyte
extended area).
(b) Pin Wait Mode
A specified number of wait states T
W
are always inserted between the T
2
state and T
3
state when
accessing the external address space. The number of wait states T
W
is specified by the settings of
the WC1 and WC0 bits. If the WAIT pin is low at the falling edge of φ in the last T
2
or T
W
state,
another T
W
state is inserted. If the WAIT pin is held low, T
W
states are inserted until it goes high.
Pin wait mode is useful when inserting four or more T
W
states, or when changing the number of T
W
states to be inserted for each external device.
(c) Pin Auto-Wait Mode
A specified number of wait states T
W
are inserted between the T
2
state and T
3
state when accessing
the external address space if the WAIT pin is low at the falling edge of φ in the last T
2
state. The
number of wait states T
W
is specified by the settings of the WC1 and WC0 bits. Even if the WAIT
pin is held low, T
W
states are inserted only up to the specified number of states.
Pin auto-wait mode enables the low-speed memory interface only by inputting the chip select
signal to the WAIT pin.
Figure 6.28 shows an example of wait state insertion timing in pin wait mode.
The settings after a reset are: 3-state access, 3 program wait insertion, and WAIT pin input
disabled.