Datasheet

Section 7 Data Transfer Controller (DTC)
Rev. 2.00 Sep. 28, 2009 Page 162 of 870
REJ09B0429-0200
The EVENTI interrupt request activates the DTC and transfers data from RAM to RAM in the
same address. Data is incremented in the DTC. The lower five bits of SAR and DAR are replaced
with address code that is generated by the ECS flag status.
When the DTC transfer is completed, the ECS flag for transfer is cleared.
Table 7.3 Flag Status/Address Code
ECS
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Address
Code
1 B'00000
1 0 B'00010
1 0 0 B'00100
1 0 0 0 B'00110
1 0 0 0 0 B'01000
1 0 0 0 0 0 B'01010
1 0 0 0 0 0 0 B'01100
1 0 0 0 0 0 0 0 B'01110
1 0 0 0 0 0 0 0 0 B'10000
1 0 0 0 0 0 0 0 0 0 B'10010
1 0 0 0 0 0 0 0 0 0 0 B'10100
1 0 0 0 0 0 0 0 0 0 0 0 B'10110
1 0 0 0 0 0 0 0 0 0 0 0 0 B'11000
1 0 0 0 0 0 0 0 0 0 0 0 0 0 B'11010
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B'11100
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B'11110
7.3.1 Event Counter Handling Priority
EVENT0 to EVENT15 count handling is operated in the priority shown as below.
High Low
EVENT0 > EVENT1 ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ EVENT14 > EVENT15