Datasheet

Section 8 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 189 of 870
REJ09B0429-0200
8.2.4 Pin Functions
The relationship between the register settings and the pin function is shown below.
(1) Extended Mode (EXPE = 1)
The pin function is switched as shown below according to the combination of the CS256E and
IOSE bits in SYSCR, the ADFULLE bit in BCR2 of the BSC, and the P2nDDR bit. Address 11 in
the table below is expressed by the following logical expression.
Address 11 = 1: ADFULLE • CS256E • IOSE
P2nDDR 0 1
ADMXE 0 1 0 1
Address 11 X X 0 1 X
Pin
function
P2n input
pin
ADm
input/output pin
Am output
pin
P2n output
pin
ADm
input/output pin
[Legend] m = 15 to 11, n = 7 to 3, X: Don't care.
P2nDDR 0 1
ADMXE 0 1 0 1
Pin
function
P2n input pin ADm input/output
pin
Am output pin ADm input/output
pin
[Legend] m = 10 to 8, n = 2 to 0
(2) Single-Chip Mode (EXPE = 0)
The pin function is switched as shown below according to the P2nDDR bit.
P2nDDR 0 1
Pin function P2n input pin P2n output pin
[Legend] n = 7 to 0