Datasheet

Section 8 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 197 of 870
REJ09B0429-0200
8.5 Port 5
Port 5 is an 8-bit I/O port. Port 5 pins can also function as the SCIF and SCI_1 input/output, bus
control output, system clock output, external subclock input, and interrupt input pins. Port 5 has
the following registers.
• Port 5 data direction register (P5DDR)
• Port 5 data register (P5DR)
8.5.1 Port 5 Data Direction Register (P5DDR)
The individual bits of P5DDR specify input or output for the port 5 pins.
Bit Bit Name Initial Value R/W Description
7 P57DDR 0 W
6 P56DDR 0 W
5 P55DDR 0 W
4 P54DDR 0 W
3 P53DDR 0 W
2 P52DDR 0 W
1 P51DDR 0 W
If port 5 pins are specified for use as the general I/O
port, the corresponding pins function as output port
when the P5DDR bits are set to 1, and as input port
when cleared to 0.
0 P50DDR 0 W