Datasheet

Section 8 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 226 of 870
REJ09B0429-0200
8.10 Port A
Port A is an 8-bit I/O port. Port A pins can also function as the address output and event counter
input pins. Port A has the following registers. PADDR and PAPIN are allocated to the same
address.
• Port A data direction register (PADDR)
• Port A output data register (PAODR)
• Port A input data register (PAPIN)
8.10.1 Port A Data Direction Register (PADDR)
The individual bits of PADDR specify input or output for the port A pins.
Bit Bit Name Initial Value R/W Description
7 PA7DDR 0 W
6 PA6DDR 0 W
5 PA5DDR 0 W
4 PA4DDR 0 W
3 PA3DDR 0 W
2 PA2DDR 0 W
1 PA1DDR 0 W
When set to 1, the corresponding pins function as
output port pins; when cleared to 0, function as input
port pins.
As the address of this register is the same as that of
PAPIN, reading from this register indicates the state
of port A.
0 PA0DDR 0 W