Datasheet

Section 9 14-Bit PWM Timer (PWMX)
Rev. 2.00 Sep. 28, 2009 Page 264 of 870
REJ09B0429-0200
Table 9.3 Settings and Operation (Examples when φ = 34 MHz)
PCSR Fixed DADR Bits
PWCKX0
PWCKX1
Bit Data
C B A CKS
Reso-
lution
T
(μs)
CFS
Base
Cycle
Conver-
sion
Cycle
TL/TH
(OS = 0/OS = 1)
Precision
(Bits)
DA3 DA2 DA1 DA0
Conversion
Cycle*
⎯ ⎯ ⎯ 0 0 1.88 μs 481.88 μs 14 481.88 μs
531.3 kHz 12 0 0 120.47 μs
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 30.12 μs
1 7.53 μs 481.88 μs 14 481.88 μs
0.03
(φ)
132.8 kHz 12 0 0 120.47 μs
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 30.12 μs
0 0 0 1 0 3.76 μs 0.964 ms 14 0.964 ms
265.6 kHz 12 0 0 0.241 ms
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 0.060 ms
1 15.06 μs 0.964 ms 14 0.964 ms
66.4 kHz 12 0 0 0.241 ms
0.06
(φ/2)
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 0.060 ms
0 0 1 1 0 120.5 μs 30.840 ms 14 30.840 ms
8.3 kHz 12 0 0 7.710 ms
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 1.928 ms
1 481.9 μs 30.840 ms 14 30.840 ms
2.1 kHz 12 0 0 7.710 ms
1.88
(φ/64)
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 1.928 ms
0 1 0 1 0 240.9 μs 61.681 ms 14 61.681 ms
4.2 kHz 12 0 0 15.420 ms
Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 3.855 ms
1 963.8 μs 61.681 ms 14 61.681 ms
1.0 kHz 12 0 0 15.420 ms
3.76
(φ/128)
Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 3.855 ms