Datasheet

Section 10 16-Bit Free-Running Timer (FRT)
Rev. 2.00 Sep. 28, 2009 Page 272 of 870
REJ09B0429-0200
Figure 10.1 is a block diagram of the FRT.
Clock selector
Clock
Compare-match A
OCRA
Comparator A
Internal data bus
FRC
Comparator B
Control logic
OCRB
TCSR
Internal clock
φ/2
φ/8
φ/32
Compare-match B
Overflow
Clear
TIER
TCR
TOCR
Interrupt signal
[Legend]
OCRA, OCRB:
OCRAR,OCRAF:
FRC:
TCSR:
TIER:
TCR:
TOCR:
Output compare registers A and B (16 bits)
Output compare registers AR and AF (16 bits)
Free-running counter (16 bits)
Timer control/status register (8 bits)
Timer interrupt enable register (8 bits)
Timer control register (8 bits)
Timer output compare control register (8 bits)
OCIA
OCIB
FOVI
OCRAR/F
Module data bus
Bus interface
Figure 10.1 Block Diagram of 16-Bit Free-Running Timer