Datasheet

Rev. 2.00 Sep. 28, 2009 Page xxxviii of xl
REJ09B0429-0200
Table 13.10 Serial Transfer Formats (Asynchronous Mode).................................................... 348
Table 13.11 SSR Status Flags and Receive Data Handling...................................................... 355
Table 13.12 SCI Interrupt Sources ........................................................................................... 386
Table 13.13 SCI Interrupt Sources ........................................................................................... 387
Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.1 Pin Configuration.................................................................................................. 407
Table 15.2 Register Access..................................................................................................... 408
Table 15.3 Interrupt Control Function.................................................................................... 413
Table 15.4 SCIF Output Setting ............................................................................................. 424
Table 15.5 Example of Baud Rate Settings ............................................................................ 425
Table 15.6 Correspondence Between LPC Interface I/O Address and the SCIF Registers .... 436
Table 15.7 Register States ...................................................................................................... 437
Table 15.8 Interrupt Sources................................................................................................... 438
Table 15.9 Interrupt Source, Vector Address, and Interrupt Priority...................................... 438
Section 16 Serial Pin Multiplexed Modes
Table 16.1 Pin Configuration.................................................................................................. 440
Section 17 I
2
C Bus Interface (IIC)
Table 17.1 Pin Configuration.................................................................................................. 452
Table 17.2 Transfer Format .................................................................................................... 456
Table 17.3 I
2
C bus Transfer Rate (1) ...................................................................................... 460
Table 17.3 I
2
C bus Transfer Rate (2) ...................................................................................... 461
Table 17.4 Flags and Transfer States (Master Mode)............................................................. 468
Table 17.5 Flags and Transfer States (Slave Mode) ............................................................... 469
Table 17.6 Output Data Hold Time ........................................................................................ 480
Table 17.7 ISCMBCR Setting ................................................................................................ 480
Table 17.8 I
2
C Bus Data Format Symbols .............................................................................. 482
Table 17.9 Examples of Operation Using the DTC ................................................................ 511
Table 17.10 IIC Interrupt Source.............................................................................................. 514
Table 17.11 I
2
C Bus Timing (SCL and SDA Outputs) ............................................................. 515
Table 17.12 Permissible SCL Rise Time (t
sr
) Values................................................................ 516
Table 17.13 I
2
C Bus Timing (with Maximum Influence of t
Sr
/t
Sf
)............................................. 518
Section 18 LPC Interface (LPC)
Table 18.1 Pin Configuration.................................................................................................. 532
Table 18.2 LADR1, LADR2 Initial Values ............................................................................ 549
Table 18.3 Host Register Selection......................................................................................... 550
Table 18.4 Slave Selection Internal Registers ........................................................................ 550