Datasheet

Section 17 I
2
C Bus Interface (IIC)
Rev. 2.00 Sep. 28, 2009 Page 459 of 870
REJ09B0429-0200
17.3.5 I
2
C Bus Transfer Rate Select Register (IICX3)
IICX3 selects the IIC transfer rate clock and sets the transfer rate of IIC channel 3.
Bit Bit Name
Initial
Value
R/W Description
7 to 4 ⎯ ⎯ ⎯ Reserved
These bits cannot be modified. The read values are
undefined.
3 TCSS 0 R/W Transfer Rate Clock Source Select
This bit selects a clock rate to be applied to the I
2
C bus
transfer rate.
0: φ/2
1: φ/4
2
1
0
IICX5
IICX4
IICX3
0
0
0
R/W
R/W
R/W
IIC Transfer Rate Select 5, 4, 3
These bits are used to control IIC_5 to IIC_3 operation.
These bits select the transfer rate in master mode,
together with the CKS2 to CKS0 bits in ICMR. For the
transfer rate, see table 17.3.