Datasheet

Section 18 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 537 of 870
REJ09B0429-0200
R/W
Bit Bit Name
Initial
Value
Slave Host Description
2 PMEE 0 R/W ⎯ PME Output Enable
Controls PME output in combination with the PMEB bit
in HICR1. PME pin output is open-drain, and an
external pull-up resistor (Vcc) is needed. The PD2DDR
bit should be cleared to 0 when the LPC is used.
PMEE PMEB
0 X : PME output disabled; general I/O
function of pin PD2 is enabled
1 0 : PME output enabled, PME pin
output goes to 0 level
1 1 : PME output enabled, PME pin
output is high-impedance
1 LSMIE 0 R/W ⎯ LSMI output Enable
Controls LSMI output in combination with the LSMIB
bit in HICR1. LSMI pin output is open-drain, and an
external pull-up resistor (Vcc) is needed. The PD1DDR
bit should be cleared to 0 when the LPC is used.
LSMIE LSMIB
0 X : LSMI output disabled; general I/O
function of pin PD1 is enabled
1 0 : LSMI output enabled, LSMI pin
output goes to 0 level
1 1 : LSMI output enabled, LSMI pin
output is Hi-Z