
Section 18 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 611 of 870
REJ09B0429-0200
Figure 18.9 shows the timing of the LPCPD and LRESET signals.
LPCPD
LRESET
LAD3 to LAD0
LFRAME
LCLK
At least 30 μs
At least 100 μs
At least 60 μs
Figure 18.9 Power-Down State Termination Timing