Datasheet

Section 18 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 614 of 870
REJ09B0429-0200
There are two modes⎯continuous mode and quiet mode⎯for serialized interrupts. The mode
initiated in the next transfer cycle is selected by the stop frame of the serialized interrupt transfer
cycle that ended before that cycle.
In continuous mode, the host initiates host interrupt transfer cycles at regular intervals. In quiet
mode, the slave with interrupt sources requiring a request can also initiate an interrupt transfer
cycle, in addition to the host. In quiet mode, since the host does not necessarily initiate interrupt
transfer cycles, it is possible to suspend the clock (LCLK) supply and enter the power-down state.
In order for a slave to transfer an interrupt request in this case, a request to restart the clock must
first be issued to the host.
18.4.8 LPC Interface Clock Start Request
A request to restart the clock (LCLK) can be sent to the host by means of the CLKRUN pin. With
LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested since the
transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host interrupt
request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is sent to
the host. The timing for this operation is shown in figure 18.11.
CLK
CLKRUN
Pull-up enable
Driven by the host processor
Driven by the slave processor
1 2 3 4 5 6
Figure 18.11 Clock Start Request Timing
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
18.4.9 SCIF Control from LPC Interface
Setting the SCIFE bit in HICR5 to 1 allows the LPC host to communicate with the SCIF. Then,
the LPC interface can access the registers of the module SCIF other than SCIFCR. For details on
transmission and reception, see section 15, Serial Communication Interface with FIFO (SCIF).