Datasheet

Section 18 LPC Interface (LPC)
Rev. 2.00 Sep. 28, 2009 Page 615 of 870
REJ09B0429-0200
18.5 Interrupt Sources
18.5.1 IBFI1, IBFI2, IBFI3, and ERRI
The host has four interrupt requests for the slave (this LSI): IBF1, IBF2, IBF3, and ERRI. IBFI1,
IBFI2, and IBFI3 are IDR receive complete interrupts for IDR1, IDR2, and IDR3 and TWR,
respectively. IBFI3 is also used for SMIC mode and BT mode interrupt requests. The ERRI
interrupt indicates the occurrence of a special state such as an LPC reset, LPC shutdown, or
transfer cycle abort. The LMCI and LMCUI interrupts are command receive complete interrupts.
Table 18.11 Receive Complete Interrupts and Error Interrupt
Interrupt Description
IBFI1 When IBFIE1 is set to 1 and IDR1 reception is completed
IBFI2 When IBFIE2 is set to 1 and IDR2 reception is completed
IBFI3 When IBFIE3 is set to 1 and IDR3 reception is completed, or when TWRE and
IBFIE3 are set to 1 and reception is completed up to TWR15
ERRI When ERRIE is set to 1 and one of LRST, SDWN and ABRT is set to 1