Datasheet

Section 19 A/D Converter
Rev. 2.00 Sep. 28, 2009 Page 626 of 870
REJ09B0429-0200
Bit Bit Name
Initial
Value R/W Description
5 ADST 0 R/W A/D Start
Clearing this bit to 0 stops A/D conversion and enters the idle
state. Setting this bit to 1 starts A/D conversion. In single
mode, this bit is cleared to 0 automatically when conversion
on the specified channel ends. In scan mode, conversion
continues sequentially on the specified channels until this bit
is cleared to 0 by software, a reset, or a transition to the
hardware standby mode.
4 ⎯ 0 R Reserved
This is a read-only bit and cannot be modified.
3 ⎯ 0 R/W Reserved
The initial value should not be changed.
Channel Select 2 to 0
Select analog input channels together with the SCANE bit
and the SCANS bit of ADCR.
2
1
0
CH2
CH1
CH0
All 0 R/W
When SCANE = 0,
and SCANS = X
000: AN0
001: AN1
010: AN2
011: AN3
100: AN4
101: AN5
110: AN6
111: AN7
When SCANE = 1
and SCANS = 0
000: AN0
001: AN0 and AN1
010: AN0 to AN2
011: AN0 to AN3
100: AN4
101: AN4 and AN5
110: AN4 to AN6
111: AN4 to AN7
When SCANE = 1
and SCANS = 1
000: AN0
001: AN1 and AN1
010: AN0 to AN2
011: AN0 to AN3
100: AN0 to AN4
101: AN0 to AN5
110: AN0 to AN6
111: AN0 to AN7
Note: * Only 0 can be written to clear the flag.
[Legend] X: Don't care