Datasheet

Section 20 RAM
Rev. 2.00 Sep. 28, 2009 Page 641 of 870
REJ09B0429-0200
Section 20 RAM
This LSI has 40 Kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by
a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on SYSCR, see section 3.2.2, System Control Register (SYSCR).