Datasheet

Appendix
Rev. 2.00 Sep. 28, 2009 Page 854 of 870
REJ09B0429-0200
MCU Operating
Mode
Port Name
Pin Name
EXPE Setting
Reset
Hardware
Standby Mode
Software
Standby Mode
Sleep Mode
Program
Execution State
Port 92 0 kept kept I/O port
HBE 1
T T
H H HBE
Port 91 0 / 1 (ADMXE=0) kept kept I/O port
AH 1 (ADMXE=1)
T T
H H AH
Port 90 0 / 1 (8 bits) kept kept I/O port
LWR, LBE 1 (16 bits)
T T
H H LWR, LBE
Port A7 to
A2
0 / 1
(address 18=1)
kept kept I/O port
A23 to A18 1
(address 18=0)
T T
kept* kept* A23 to A18
Port A1, A0 0 / 1
(address 13=1)
kept kept I/O port
A17, A16 1
(address 13=0)
T T
kept* kept* A17, A16
Port B X T T kept kept I/O port
Port C X T T kept kept I/O port
Port D X T T kept kept I/O port
Port E X T T kept kept I/O port
Port F X T T kept kept I/O port
Legend
H: High level
L: Low level
T: High impedance
x: Don’t care
kept: Input port pins are in the high-impedance state (when DDR = 0 and PCR = 1, the input pull-
up MOS remains on).
Output port pins retain their states.
Functions of some pins will be changed to the I/O port function, which is determined by
DDR and DR, because the on-chip peripheral module associated with that pin function is
initialized.
DDR: Data direction register
Note: * In the case of address output, the last address accessed is retained.