Datasheet
Section 17 I
2
C Bus Interface 2 (IIC2) 
R01UH0309EJ0500 Rev. 5.00    Page 1045 of 1408 
Sep 24, 2012     
H8S/2456, H8S/2456R, H8S/2454 Group 
TDRE
Data n
TEND
ICDRS
ICDRR
19 23456789
TRS
ICDRT
A
SCL
(master output)
SDA
(master output)
SDA
(slave output)
SCL
(slave output)
Bit 7
Slave transmit mode
Slave receive
mode 
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
[3] Clear TEND
 [5] Clear TDRE 
[4] Read ICDRR (dummy read)
 after clearing TRS 
User
processing
A/A
Figure 17.10 Slave Transmit Mode Operation Timing 2 










