Datasheet

Rev. 2.00 Aug. 20, 2008 Page 1188 of 1198
REJ09B0403-0200
Item Page Revision (See Manual for Details)
29.2 Register Bits 1089,
1103
Amended
Register
Abbreviation
Bit 3 Bit 2 Bit 1 Bit 0 Module
   
   
   
TRSCER
   
E-DMAC
Notes: The registers related to USB are supported only by the
H8S/2472 Group.
The registers related to PECI are supported only by the
H8S/2472 Group and the H8S/2462 Group.
29.3 Register States in
Each Operating Mode
1116 Added
Notes: 1. The registers related to USB are supported only by
the H8S/2472 Group.
2. The registers related to PECI are supported only by
the H8S/2472 Group and the H8S/2462 Group.
Section 30 Platform
Environment Control
Interface (PECI)
1117 Added
If this module is not used, the PECI-related pins should be
handled as follows. PECI is not supported by the H8S/2463
Group.
Section 31 Electrical
Characteristics
Table 31.1 Absolute
Maximum Ratings
1119 Amended
Item Symbol Value
PECI reference power supply voltage PEVref –0.3 to +1.5
Table 31.10 Timing of
On-Chip Peripheral
Modules
1145 Item added
Item Symbol Min. Max.
Receive data setup time
(synchronous)
t
RXS
30.0  SCI
(multiplexed
with P51)
Receive data hold time
(synchronous)
t
RXH
30.0 
Figure 31.30 SSU
Timing (Slave, CPHS =
1)
1149 Figure title amended
Table 31.16 JTAG
Timing
1159 Amended
Item Symbol Min. Max.
ETCK clock cycle time t
TCKcyc
29.4* 50*