Datasheet

Rev. 2.00 Aug. 20, 2008 Page 1192 of 1198
REJ09B0403-0200
Control transfer....................................... 870
Conversion cycle .................................... 367
CPU operating modes
Advanced mode .................................... 30
CPU operating modes............................... 28
Normal mode ........................................ 28
CRC operation circuit............................. 499
Crystal oscillator................................... 1050
D
Data direction register .................... 189, 272
Data register.................................... 189, 272
Data stage ............................................... 872
Data transfer controller (DTC) ............... 161
Download pass/fail result parameter....... 936
DTC vector table .................................... 175
E
Effective address................................. 53, 57
Effective address extension ...................... 52
ERI1........................................................ 489
ERI2........................................................ 489
Error protection ...................................... 982
EtherC receiver....................................... 779
EtherC transmitter................................... 776
Ethernet controller (EtherC) ................... 757
Ethernet controller direct memory
access controller (E-DMAC) .................. 791
Exception handling ................................... 71
Exception handling vector table ............... 72
Extended control register (EXR) .............. 35
External clock....................................... 1051
F
Flash erase block select parameter.......... 943
Flash MAT configuration ....................... 919
Flash multipurpose address area
parameter ................................................940
Flash multipurpose data destination
parameter ................................................940
Flash pass/fail parameter......................... 944
Flash programming/erasing frequency
parameter ................................................938
Flow control............................................ 786
FOVI ....................................................... 386
Framing error ..........................................458
G
General registers ....................................... 34
H
Hardware protection................................980
Hardware standby mode .......................1069
I
I/O ports .................................................. 189
I/O select signals.....................................126
I
2
C bus formats .......................................619
I
2
C bus interface (IIC)............................. 587
Input pull-up MOS control
register ............................................ 189, 272
Input pull-up MOSs ........................ 189, 272
Instruction set............................................ 41
Arithmetic operations instructions ........ 44
Bit manipulation instructions................ 47
Block sata transfer instructions ............. 51
Branch instructions ............................... 49
Data transfer instructions ...................... 43
Logic operations instructions ................ 46
Shift instructions ................................... 46
System control instructions................... 50
Interface .................................................. 431
Internal block diagram ................................3